Ethernet repeaters, also called Ethernet extenders, are commonly composed of a pair of PHYs (Ethernet Physical Interface chips) that are wired back-to-back. Part of the typical “hard-wired” configuration is the link speed. In the simplest form, this is a pair of PHY chips directly wired back-to-back. They could be individual chips or a “dual-PHY” on a single chip. The common purpose of a repeater is to overcome signal degradation due to cable length by recovering and recreating (i.e., repeating) the data stream on the next link segment. Because of the intended purpose of a repeater, it is a 2-port device.
Ethernet switches are network devices that typically have three or more ports, each of which can receive (input) or send (output) data. The switch processes and forwards data from an input port to the appropriate output port(s). An “unmanaged” switch can have internal logic that controls the negotiation and buffering of the data to route messages received on one port to the appropriate port(s) based upon the unique Media Access Control (MAC) address of the endpoint PHY. A “managed” switch does more, as the name implies. For example, a “managed” switch may be designed to support advanced protocols, such as Audio Video Bridging (AVB) and Time Sensitive Networking (TSN), which require more complex “fabric” in the chip itself to deal with these protocols, and may require an advanced microcontroller to configure/manage the switch fabric, and thus the data flow. The microcontroller may be completely external to the switch chip, or may be integrated on the switch chip, or the switch may use a microprocessor to manage more complex electronic “fabric” which can accept Ethernet packets on more than one port, determine which port, or ports, to route that traffic to, and then forward it to the appropriate ports. Connected between the switch fabric chip and the module connector is a PHY, one for each port. Switches may also have an integrated PHY. These switch capabilities raise the complexity of the device which requires more advanced microprocessors/microcontrollers.
It would be desirable to not require the complexity of advanced software management of the interface, even for advanced network protocols, and to avoid the cost/complexity of an Ethernet Switch or advanced microcontroller, by providing just enough intelligence in a simple repeater that it can auto-negotiate link speed using a simpler and less expensive microcontroller. A sufficiently simple implementation may be deemed “provable correct” and avoid the complexity of more advanced microcontrollers and complex software. This may also reduce the potential for software defects and avoid the complexity of requiring field reprogramming or replacement of a microcontroller.